This design idea shows a practical circuit that implements synchronous detection to amplify a small DC voltage with high linearity and good noise immunity. Such circuits are required for measurements involving current shunts, load cells, thermocouples, etc. Synchronous detection is described in many books, papers, and instrument manuals. If you are unfamiliar with this topic, reference 1 is a good place to start.
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Figure 1 Here is a block diagram of the amplifier. Provides a fixed gain of 1000 between an instrumentation amplifier, an adjustable non-inverting amplifier, and a lowpass filter. Polarity switches and instrumentation amplifiers convert a DC input to a bipolar square wave signal, so synchronous detection techniques can be applied.
Figure 1 Block diagram of the amplifier.
Figure 2 Circuits for the first four units in the block diagram are shown. High quality op amps offer ultra-low offset voltage, very low noise, and a slew rate of 20 V/µs. All resistors have a 1% tolerance, but the R1-R6 resistors are pair matched to 0.05%.
Figure 2 Schematic of part of the amplifier (filter shown separately below).
Figure 3 Here is the schematic of the filter. This is a standard design for a 4-pole Sallen-Key lowpass filter with a DC gain of 2.576 (reference 2), a cutoff frequency of 1 Hz, and a low-off rate of -80 dB/dec.
Figure 3 Circuit diagram of a low-pass filter.
The square wave oscillator is based on the 74HC4060 chip. The frequency is set to 577 Hz. It is approximately evenly spaced prime numbers between the nearest 50 Hz and 60 Hz harmonics.
Figure 4 shows the PCB. This is a two layer board with dimensions of 78 mm x 62 mm (3.07 inch x 2.44 inch). All analog grounds use separate traces connected to one point for power ground. All measurements are relative to this common point.
Figure 4 A two-layer PCB for the amplifier.
Circuit performance is evaluated with a home-made voltage calibrator (ref. 3) and a 6.5-digit multimeter. A 100:1 voltage divider is placed between the two boards to increase the input voltage resolution.
The transfer function is approximated by a best-fit line. The formula for a straight line is:
(1) V.BF = 1001.1 * Vof – 0.013
Figure 5 displays the deviation between the experimental data for Vout and the best fit line. The error is +1 to -1 mV. With reference to a full-scale voltage of 10 V, this is an excellent result. The 13 mV offset in the transfer function can be easily canceled by hardware, or by firmware if the circuit is connected to a microcontroller.
Figure 5 Circuit performance: Deviation between experimental data and best fit line is within ±1 mV.
In conclusion, there are some measures that can be applied to improve cost and performance.
- Keep the wires connecting signal sources to the board as short as possible.
- Inexpensive op amps with less extreme offset voltage specifications can be used for U3.
- If possible, use a 2-pole filter. A second op amp in the package can be used to cancel transfer function offsets.
- Using SMD components reduces PCB size and cost.
- Orozco L. Uses synchronous detection to make high-precision, low-level measurements. Analog Devices technical article MS-2698.
- Smith S. A Scientist’s and Engineer’s Guide to Digital Signal Processing. Second Edition, Chapters 3 and 32, California Technical Publishing, 1999.
- 3. Dimitrov J. DCV calibrator and reference error is less than 70 µV. EDN, DIY, May 26, 2017.
–Jordan Dimitrov is an electrical engineer and PhD with 30 years of experience. He teaches electrical and electronic engineering courses at a community college in Toronto.
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