Over the past few years, SiC MOSFETs have played a dominant role in high voltage (> 600V) and high power applications. The advantages of thermal conductivity, high critical magnetic field, significantly improved switching efficiency, and the ability to form silicon dioxide on its surface enable significant process, design, and reliability improvements, board chargers, EVs for traction inverters, DC-DC converters, PV inverters, motor control, transportation systems, and power grids.
Back in the 1990s, most research on GaN focused on the creation of blue, and ultimately white, LEDs and lasers. The foundation for this is the direct bandgap of ~ 3.4 eV, the ability to form a quaternary layer with Al, In, P, and quantum confinement via a heterojunction layer created by metalorganic CVD (MOCVD). We then took advantage of this task to take advantage of the high electron mobility and saturation rates achieved with high electron mobility transistors (HEMTs) to create RF devices that are far superior to the corresponding Si. It is in this area of RF MMICs that the GaN PoweHEMT process and design techniques have been significantly improved, and today these are some important communications, which exceed RF X or have frequency ratings in RF X. It forms the backbone of radar and electronic warfare equipment. -Band spectrum (8.5-11 GHz).
The voltage range for these RF devices was typically less than 200V. Lateral HEMT devices have natural drawbacks compared to the commonly used vertical V-DMOS. SiC MOSFET for HV devices Created (see Figures 1 (a) and 1 (b) for typical device cross sections). The high surface electric field in the lateral drift region between the gate and drain can usually improve this rating with some advances in field plate technology that limits the high voltage limit and forms / reduces the electric field.
Table 1 lists some of the key material properties of SiC and GaN.
The bulk SiC mobilities cited in the literature are much higher (~ 700-1000 cm2 / Vs), but the mobilities obtained with MOSFETs are much lower, despite the cause of the SiC / SiO2 trap sites. Please note in particular. interface. The mobility described in the GaN Power HEMT is observed and reported in two-dimensional electron gas (2-DEG) formed at the AlGaN / GaN interface that forms the conduction channel of the device.
From the initial focus on this RF device, significant advances have been made in GaN transistors to provide devices in the HV power FET range. Several companies such as Transphorm, ST Microelectronics, GaN Systems, Cambridge, Innoscience, GaN Power International and Texas Instruments offer devices rated above 650V. From a voltage standpoint, this is a sweet spot for some EV applications such as Level 2 Onboard Chargers (OBC) and other applications that have long been considered to be in the SiC domain. GaN offers lower terminal capacity and improved mobility, enabling device scaling and faster and more efficient switching. Since there is no pn junction, there is no reverse recovery loss due to switching. Since then, heat transfer and packaging have become important constraints, and much research is now focused on improving them.
Figures 2 and 3 below show the expansion space of GaN in these applications.
Growth of GaN is typically done on SiC or Si substrates. The buffer layer helps reduce the stress caused by grid mismatches. RF GaN manufacturers typically opted for the GaN on SiC approach to take advantage of SiC’s superior thermal capacity for high power density amplifiers. The power FET industry has opted for the GaN on Si approach. Si substrates offer a much cheaper approach and also provide an easier path for 200mm wafer manufacturing. Innoscience has demonstrated this with 8-inch GaN on SiFab in China.
The GaN Power HEMT devices are, of course, poor mode devices. (Or d mode: normally on, but requires a negative Vgs to turn it off). For most power FET applications, operation in enhancement mode (or e-mode: normally off, the device should be turned off at 0V) is essential. Two different approaches are used for this purpose. On the one hand, changing the height of the barrier can be done using p-type GaN or AlGaN gates, creating a depleted region under this layer, usually off devices. This approach is favored by many for manufacturing e-mode HEMT devices. Another approach is to cascode the LVSi- MOSFET in series with the GaN device, as shown in Figure 4.
There is a trade-off between the two approaches. A single e-mode device is easy to use, reduces the complexity of parallel devices and provides excellent capacitance and reverse recovery characteristics, but the problem is much more than 1.5V due to the characteristics of the p-AlxGayN. It is difficult to achieve a threshold voltage that exceeds. layer. This makes the gate more susceptible to switching noise and spurious device behavior.
The cascode method provides a much more robust gate in the Vt range of 2.5V and above. Higher gate margins allow for easier gate drivers.
A parametric analysis is shown in Table 2 below to compare the behavior of the device and the strengths and weaknesses of each approach. Four devices were selected for this analysis: two SiC MOSFETs and two GaN-powered HEMTs. The maximum Vds operating voltage for all four is approximately 650V and the 25CRdson rating is approximately 20mOhms. The two GaN devices are labeled G1 and G2, and the SiC devices are labeled S1 and S2. In addition, devices S2 and G2 use the same package, so in this case the differences between some AC characteristic packages can be ignored.
Parameters of interest are highlighted in yellow, and preferred parameters are highlighted in green. It is immediately clear that the G1 with a single e-mode device offers the key advantage of GaN: the absence of reverse recovery charge QRr. However, the low gate margin is also accentuated by the much higher I.gss Gate leak. G2, on the other hand, has a good gate margin, similar to SiC, but with a corresponding increase in QRr.
In general, the low gate charge Qg is highlighted in both GaN power HEMTs. This can significantly improve hard switching applications.
One of the obvious drawbacks of GaN highlighted in Table 2 is the low temperature coefficient of Rdson, which more than doubles 25oCRdson at 150 ° C. It can also be argued that if the goal is to meet a particular 150oCRdson, GaN devices need to be effectively built with excess margin at 25oC, along with a corresponding increase in die size and gate / output capacity. I can do it. With the increase in Rdson, a more parallel device approach becomes more important. Parallelization of GaN devices can be problematic due to a variety of parasitic components, especially in cascode connections. An integrated gate driver with adaptive control could be a possible solution.
https://www.powerelectronicsnews.com/gan-power-hemt-650-v-a-parametric-analysis-and-comparison-to-sic-mosfet/ GaN power HEMT> 650V: Parametric analysis and comparison with SiC MOSFETs